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T: Fachverband Teilchenphysik

T 52: Silicon Detectors V

T 52.2: Talk

Wednesday, March 18, 2026, 16:30–16:45, KH 01.012

Characterization of CASSIA 1, an LGAD design in a commercial CMOS imaging process — •Silas Müller, Christian Bespin, Hans Krüger, Lars Schall, Sinou Zhang, Alexander Walsemann, Rasmus Partzsch, Fabian Hügging, and Jochen Dingfelder — Physikalisches Institut der Universität Bonn, Nußallee 12, 53115 Bonn

Next-generation detector technologies have to cope with high rate environments, where precise time-tagging is needed. Sensors with internal gain may offer several advantages for these applications. They can achieve higher signal amplitudes, which can simplify the design of in-pixel electronics, and their superior timing performance may be beneficial for future 4D tracking or time-tagging applications. The CASSIA project (CMOS Active SenSor with Internal Amplification) seeks to develop monolithic active pixel sensors (MAPS) with internal signal gain and low noise, implemented within the Tower Semiconductor 180 nm process. This talk presents first characterization results from CASSIA 1, a prototype designed to test the feasibility of integrating a gain layer in a 180 nm commercial CMOS imaging Tower Semiconductor process. Different gain layer configurations are examined and results from electrical tests as well as measurements with radioactive sources are shown. Gain measurements obtained with pulsed lasers of different wavelength and initial test beam results are presented.

Keywords: LGAD; SPAD; CASSIA