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HK: Hadronen und Kerne
HK 56: Postersitzung
HK 56.70: Poster
Mittwoch, 18. März 1998, 17:00–19:00, Foyer
Development of fast readout-electronics for HADES-RICH — •C. Theurer, J. Friese, R. Gernh"auser, J. Homolka, A. Kastenm"uller, P. Kienle, H.-J. Körner, M. M"unch, and K. Zeitelhack — Physik Department E12, Technische Universit"at M"unchen, James-Franck-Stra"se, D-85748 Garching
The expected high event rate of about 105/s and the resulting amount of data that has to be processed online requires an advanced solution for readout hardware and data acquisition. Frontend modules for analog data processing, analog-digital conversion and zero suppression have been developed and will be used in combination with a VME based readout controller.
For both modules field programmable gate arrays (FPGA) are used to meet the special needs of fixed timing, speed and flexibility.
The actual status of the readout electronics, experience with hardware prototypes and software and test beam results obtained with a RICH prototype will be presented.
Supported by GSI and BMBF contract 06TM872 TP II.