Berlin 2005 – wissenschaftliches Programm
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SYFS: Nichtflüchtige Festkörperspeicher
SYFS 4: Poster
SYFS 4.4: Poster
Samstag, 5. März 2005, 08:30–16:30, Poster TU C
CMOS-compatible multi-dot floating-gate non-volatile memory fabrication by ion beam processing — •K.-H. Heinig1, B. Schmidt1, T. Müller1, C. Bonafos2, A. Claverie2, K.-H. Stegemann3, E. Votintseva3, P. Normand4, P. Dimitrakis4, E. Kapetanakis4, M. Perego5, M. Fanciulli5, and V. V.Soncini6 — 1Forschungszentrum Rossendorf, Dresden, Germany — 2CEMES/CNRS, Toulouse, France — 3ZMD, Dresden, Germany — 4IMEL, NCSR Demokritos, Athens, Greece — 5MDM-INFM, Agrate, Italy — 6Central R&D STMicroelectronics, Agrate, Italy
Conceptual, the replacement of floating poly-Si gates in current flash RAMs by Si nanocrystal (NC) layers leads to considerable improvements: Single tunnel oxide defects lead not to complete de-charging of floating gates, i.e. thinner tunnel oxides are possible which allows charging by direct tunnelling, resulting in better endurence, faster operation and lower write voltage of memories. Thus, due to this small modification of current non-volatile memories the performance might be improved substantially. The fabrication of such narrow Si NC layers is a challenge to materials research. Within an EU project with leading industry involved, we showed that this structure can be achieved by ion beam processing. Two approaches were studied, (i) low-energy ( ≈ 1 keV) Si+ ion implantation in gate oxides and (ii) ion beam mixing of (001)Si/oxide/poly-Si stacks by high-energy ( ≈ 100 keV) Si+ ion irradiation. Both processes are CMOS-compatible, and with each process non-volatile memories have been fabricated. The memory characteristics are very promising. Here we will focus on NC layer fabrication.