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HK: Fachverband Hadronen und Kerne

HK 30: Accelerators and Instrumentation I

HK 30.5: Talk

Tuesday, March 17, 2009, 15:15–15:30, H-ZO 80

Application of a versatile digital readout system for the PANDA Micro Vertex Detector — •Marius C. Mertens, James Ritman, and Tobias Stockmanns — Forschungszentrum Jülich GmbH, Institut für Kernphysik, Jülich

The Micro Vertex Detector (MVD) for the PANDA experiment at the Facility for Antiproton and Ion Research (FAIR) will be the innermost subdetector. Challenges include its triggerless readout and a high occupancy due to its proximity to the interaction point. Thus, the MVD design foresees hybrid silicon pixel sensors for the inner layers, silicon strip sensors for the outer layers and a custom frontend chip which can sustain high data rates for the readout. During the development of the MVD, a powerful and flexible system is needed to test detector electronics. Both the suitability of existing concepts and newly developed circuits have to be evaluated. Thus, we built a reconfigurable digital readout system based on a Virtex 4 FPGA in order to support a variety of frontend electronics. This is achieved by a modular design of hardware, firmware and software. Currently, the digital readout system interfaces to an Atlas pixel detector frontend chip (FE-I3) to assess its suitability for the PANDA MVD. A future step is the connection of a frontend chip specifically designed for the PANDA MVD (ToPiX), which is currently under development at INFN Torino. We will present the test setup based on the digital readout system with special focus on the application of prototype testing. Results from the readout of the Atlas FE-I3 will be shown, along with an outlook on tests with the ToPiX frontend chip. Supported in part by the EU and FZ-Jülich.