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T: Fachverband Teilchenphysik

T 69: Halbleiterdetektoren: Modulbau und Test

T 69.4: Talk

Tuesday, February 28, 2012, 17:35–17:50, ZHG 005

Module concepts with ultra thin FE chips and Through Silicon Vias for the upgrades of the ATLAS pixel detector — Marlon Barbero, •Laura Gonella, Fabian Huegging, Hans Krueger, and Norber Wermes — Physikalisches Institut Uni Bonn, Nussallee 12, 53115 Bonn

The development of trackers for High Energy Physics experiments at high luminosity poses strict requirements on the material budget to allow good vertexing and b-tagging performance. State-of-the-art silicon technologies offer a variety of processes that can be used to achieve light modules design. Together with IZM Berlin we investigated the thinning of FE (Front-End) chips down to 90um, and developed a dedicated flip chip process to assure a reliable mechanical and electrical connection between thin FE chips and sensor. The selected flip chip method is currently used for the production of modules for the IBL (Insertable B-Layer) project, the first ATLAS pixel detector upgrade. Results from the characterization of IBL modules with 100 and 150um thin FE chip will be shown. For future upgrades of the ATLAS pixel detector we propose more advanced module concepts with Through Silicon Vias (TSVs). IZM offers two via last TSV processes, Straight Side Wall TSVs and Tapered Side Wall TSVs. Both processes were successfully demonstrated with ATLAS pixel readout electronics (FE-I2/3). Results from prototype modules with planar sensor and 90um thin FE-I2 with Tapered TSV and back side redistribution layer will be shown.