Mainz 2012 – wissenschaftliches Programm
HK 53.6: Poster
Donnerstag, 22. März 2012, 14:00–16:00, P Foyer
Upgrade of the Jülich Digital Readout System for the Development of the PANDA-MVD — •Simone Esch1, Tobias Stockmanns1, Marius C. Mertens1, Michael Ramm2, Wilhelm Erven2, and James Ritman1 — 1IKP Forschungszentrum Jülich — 2ZEL Forschungszentrum Jülich
The PANDA detector is one of the main experiments at the upcoming Facility for Antiproton and Ion Research in Darmstadt (FAIR). The fixed target experiment will explore pp annihilation with phase space cooled beams with momenta between 1.5 and 15 GeV/c. For the development of the Micro Vertex Detector (MVD), the innermost tracking detector, the evaluation of prototypes and detector parts is very important. Different prototypes of the pixel front-end chip ToPix (Torino Pixel) need to be tested and characterized under similar conditions. To control these devices under test (DUT) a suitable readout system is necessary. To have similar conditions for different prototypes a modular concept of a readout system is required which can be adapted in a simple way to the specific interface of different DUTs. To meet the requirements of an upcoming full size ToPix prototype and online analysis an upgrade of the Jülich Digital Readout System was developed. The Xilinx ML605 evaluation board with the Virtex 6 is the main hardware component of the upgraded system providing a 1 GBit/s optical connection and 2 Gb DDR3 RAM. The DUT can be connected via a 160 pin free configurable connector to the FPGA. An overview about the system componentens and measurements of the ToPix prototype with the new readout system will be shown.