Dresden 2013 – wissenschaftliches Programm

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HK: Fachverband Physik der Hadronen und Kerne

HK 53: Poster - Instrumentation II

HK 53.7: Poster

Mittwoch, 6. März 2013, 16:45–19:00, HSZ 3.OG

A 98-channel FPGA-based time-to-digital converter (TDC) — •John Bieling — Physikalische Institut der Universität Bonn

A new 98-channel FPGA-based time-to-digital converter (TDC) has been developed for the BGO-OD experiment located at the ELSA accelerator facility in Bonn. Its main feature is the ability to handle an input rate of 200MHz on all channels in parallel for up to 1.25µs. It uses a Spartan6 from Xilinx and has as resolution (bin-size) of 100ps (240ps using a Spartan3).

To achieve this, the TDC serializes the recorded hits only after the trigger event and uses a second memory page to continuously record hits. Furthermore, it uses the carry-chain-sampling method to reach its sampling resolution.

The poster illustrates the ideas and technical methods invoked.