Bonn 2020 – wissenschaftliches Programm

Die DPG-Frühjahrstagung in Bonn musste abgesagt werden! Lesen Sie mehr ...

Bereiche | Tage | Auswahl | Suche | Aktualisierungen | Downloads | Hilfe

HK: Fachverband Physik der Hadronen und Kerne

HK 10: Instrumentation II

HK 10.5: Vortrag

Montag, 30. März 2020, 17:30–17:45, J-HS D

Data Pre-Processing on FPGAs with High-Level Synthesis for High-Energy Physics Experiments — •Thomas Janson and Udo Kebschull — IRI, Goethe-Universität Frankfurt am Main, Max-von-Laue-Straße 12, 60438 Frankfurt am Main, Germany

In this talk, we discuss a methodology of implementing massive parallel algorithms using the C++ high-level synthesis. The methodology belongs to the domain of high-performance computing and is discussed from this viewpoint. FPGAs for high-performance computing are becoming increasingly important and manufacturers such as Intel or Xilinx have recently developed their first accelerator cards for this. We show, that the methodology is also applicable for preprocessing in FPGA based readout cards widely used in high-energy physics experiments.

100% | Mobil-Ansicht | English Version | Kontakt/Impressum/Datenschutz
DPG-Physik > DPG-Verhandlungen > 2020 > Bonn