Bonn 2020 – wissenschaftliches Programm
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HK 40.9: Vortrag
Mittwoch, 1. April 2020, 19:00–19:15, J-HS K
A sampling ADC system for front end free straw tubes readout — •Paweł Kulessa1, Andreas Erven1, Tanja Hahnraths von der Gracht1, Lioubov Jokhovets1, Henner Ohm1, Krzysztof Pysz2, Jim Ritman1, Christian Roth1, Mario Schlösser1, Thomas Sefzick1, Valery Serdyuk1, Stefan van Waasen1, and Peter Wintz1 — 1FZJ Jülich, Germany — 2INP PAN Kraków, Poland
Tracking systems consisting of several thousand straw tubes are forseen for the FAIR experiments. A readout must run in a triggerless mode at an average rate up to 1 MHz per straw and has to provide both time and energy loss information for particle tracking and identification. The standard readout scheme of such systems is to place front end electronics inside the detector and a free-running TDC readout outside.
This talk presents a sampling ADC (sADC) system, which has no electronic parts inside the detector, consequently no heating problems exist, no radiation damage can happen, the granularity of the system is very high and the space needed inside the detector is reduced.
The sADC system consists of: coaxial cables, HV decoupling boards in dedicated crates, preamplifiers and 250 MHz sADC boards placed in two openVPX crates. Per crate 14 sADC and preamplifiers (160 channels each), one data concentrator and one controller boards are foreseen. The FPGA (VIRTEX7) firmware provide: pulse and pile-up detection, baseline determination and correction, extraction of signals time and charge information. It can also provide other information e.g. signal amplitude, time over threshold or the "raw" signal shape.