Erlangen 2026 – wissenschaftliches Programm

Bereiche | Tage | Auswahl | Suche | Aktualisierungen | Downloads | Hilfe

T: Fachverband Teilchenphysik

T 6: Electronics, Trigger, DAQ I

T 6.8: Vortrag

Montag, 16. März 2026, 18:00–18:15, KH 00.023

Emulator-Based Evaluation of FPGA Algorithms for the ATLAS MDT Trigger Processor — •Marcel Marques Boonen, Davide Cieri, Oliver Kortner, and Sandra Kortner — Max Planck Institute for Physics , Garching, Germany

The Monitored Drift Tube Trigger Processor (MDTTP), a new FPGA-based component of the High- Luminosity LHC upgrade of the ATLAS muon trigger, is being developed to reconstruct muon tracks at the first-level trigger using the information from the MDT detectors. Two proposals for the determination of the muon transverse momenta are currently under investigation: an algorithm that translates the sagitta of the muon trajectory into transverse momentum using pre-defined conversion functions, and a machine-learning approach that exploits the directions and positions of the muon trajectory in the muon chambers.

Both approaches rely on a data processing chain capable of buffering and handling large data streams. To simulate such data processing under realistic conditions, dedicated Monte Carlo data are stored in DDR memories of one MDTTP board and then sequentially injected via optical fibers into the MDTTP board under test. This presentation will describe the implementation of this approach and its application in evaluating the performance of the aforementioned transverse-momentum calculation procedures.

Keywords: Trigger; FPGA; MDTPP; Muon; Trajectory