Hamburg 2001 – scientific programme
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HL: Halbleiterphysik
HL 28: Si / Ge
HL 28.2: Talk
Thursday, March 29, 2001, 10:45–11:00, S9/10
Investigations of Stress-Induced Leakage Current in Ultrathin Silicon Oxides — •Tatsiana Guminskaya and Peter Gaworzewski — Im Technologiepark 25, 15236 Frankfurt (Oder), Germany
Investigations of Stress-Induced Leakage Current in Ultrathin Silicon Oxides T. Guminskaya and P. Gaworzewski
We investigated stress-induced leakage current in ultrathin silicon oxides. We extended the model of Chou et. al.1, elaborated for thin oxides ( tox > 4 nm). We found that this improved model suitably describes the stress-induced leakage current in ultrathin oxides. Aggressive scaling in device dimensions of modern CMOS technology forces shrinking of oxide thickness down to tox = 1.5 nm. Prediction of ultrathin oxide degradation due to electrical stress in operating metal-oxide-semiconductor devices is of special importance. This requires to investigate the behavior of ultrathin oxides under electrical stress. Therefore, we extended the model of Chou et. al.1 taking into account the evolution of stress-induced leakage current with time. Applying a trap-assisted tunneling mechanism we quantitatively modelled the evolution of stress-induced leakage current with time as a function of voltage and oxide thickness. We compared the results with experimental data obtained on wafers comprising capacitors with oxide thicknesses ranging from 2 nm to 5.1 nm. The model suitably describes the stress-induced leakage current as function of voltage, time and thickness if appropriate parameters for tunneling probability and energy distribution of traps are used. 1A. I. Chou, K. Lai, K. Kumar, P. Chowdhury, J. C. Lee, Appl. Phys. Lett., 70 (25), 3407 (1997)