Dresden 2011 – wissenschaftliches Programm
DS 7.2: Vortrag
Montag, 14. März 2011, 18:00–18:15, GER 37
Statistical Analysis of Computer-simulated On-Chip Interconnect Electromigration Lifetimes under the Influence of Microstructure and Strengthened Top Interface — •Matthias Kraatz1, Lijuan Zhang2, Dieter Schmeisser1, Ehrenfried Zschech3, and Paul S. Ho2 — 1BTU Cottbus, Germany — 2The University of Texas at Austin, USA — 3Fraunhofer Institute for Non-Destructive Testing IZFP, Dresden, Germany
We are investigating the statistics of computer-simulated interconnect electromigration (EM) lifetimes with regard to the effects of microstructure and a strengthened top interface. The degradation process of EM once threatened the entire existence of integrated circuit industry in the 1960s and has remained a major reliability concern. Ongoing miniaturization and the introduction of new materials further complicate the task of EM-resistant chip manufacturing. We have developed a simple two-dimensional finite difference simulation that models the mass transport by electromigration along the grain boundaries and the top interface of interconnect segments that allows us to do calculations of void nucleation and growth. A parallel computer simulates hundreds of interconnects simultaneously and statistical analysis becomes feasible. A Monte Carlo grain growth algorithm (a modified Potts version) is applied to model the grain structure of the interconnect segments. We will show that the simulation can be used to compare simulation and experiment qualitatively. Four cases have been studied: interconnect segments with small/large grains and weak/strong top interface.