Berlin 2012 – wissenschaftliches Programm
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DS: Fachverband Dünne Schichten
DS 20: Application of thin films
DS 20.6: Vortrag
Mittwoch, 28. März 2012, 10:45–11:00, H 0111
Fabrication and characterisation of CNT via interconnects for application in integrated circuits — •Holger Fiedler1, Sascha Hermann1, Stefan E. Schulz1,2, and Thomas Gessner1,2 — 1Chemnitz University of Technology, Center for Microtechnologies (ZFM), 09126 Chemnitz, Germany — 2Fraunhofer Research Institute for Electronic Nano Systems (ENAS), 09126, Germany
Carbon nanotubes (CNT) have special properties, like high electrical and thermal conductivity as well as a strong resistance towards electromigration. This is why CNTs are potential candidate to replace copper in integrated circuits as interconnect material. We designed and fabricated CNT vias based on a metal/CNT hybrid technology. Via structures were patterned using a damascene process flow. Multi-wall carbon nanotubes (MWCNT) were vertically grown in vias by chemical vapour deposition on a metallic substrate. Site-selectivity is achieved by employing surface-catalyst interactions to restrict CNT growth to the vias. The gaps between the CNTs were filled with silicon dioxide by decomposition of tetraethylorthosilicate. This is stabilizing the CNT arrays for a subsequent chemical mechanical planarization (CMP). Employing CMP provides two major benefits. Firstly, all shells of the MWCNT can be contacted and therefore contribute to the number of conductive paths. Secondly, due to the flatter surface after CMP, the deposition of the top contact layer is homogeneous, which significantly improves the metal-CNT contact. IV characteristics were obtained from 440 structures per wafer. 95% of the dies investigated show a resistance below 1 kΩ.