Regensburg 2013 – wissenschaftliches Programm
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HL: Fachverband Halbleiterphysik
HL 73: Devices
HL 73.6: Vortrag
Donnerstag, 14. März 2013, 10:45–11:00, H15
d-DotFET: Using locally strained silicon for mobility enhancement in MOSFET devices — •Jürgen Moers1,2, Julian Gerharz1,2, and Detlev Grützmacher1,2 — 1Peter Grünberg Institut 9 (PGI-9), Forschungszentrum Jülich, D-52425 Jülich, Germany — 2JARA -Fundamentals of Future Information Technology (JARA-FIT)
In MOSFET devices strained silicon is regarded as material to improve device performance due to enhanced mobility. In the d-DotFET approach we use ordered Ge dots to facilitate locally strained silicon layers. The growth sites of the Ge dots, which serve as local pseudosubstrate for the subsequently grown Si, are defined by template assisted self assembly: the Ge dots grow on prepatterned sites only. By integrating the MOSFET on top of this locally strained layer the strain can be utilized to improve device performance. The applied strain in the Si layer can be larger as in the planar case, because the Ge content in the dots is larger than possible in normal blanket epitaxy of SiGe-layers. Transistors with gate length between 60 nm and 1 µ m were processed with different gate width ranging from 60 nm to 180 nm. In comparison to transistors fabricated on the same chip, but without strained layer, the drain current enhancement is up to 35%. In devices where the Ge-dot is not removed the drain current increase is 22.5%, showing that removing the Ge dot further increases performance. In conclusion exploiting locally strained silicon in the d-DotFET concept offers an alternative route to get higher strain and hence improved device performance in MOSFET applications.